Course Details in 2023/24 Session

Module Title	LH Electronic Engineering
School	School of Engineering
Department	Elec, Elec & Sys Engineering
Module Code	04 30067
Module Lead	Dr M Nazir
Level	Honours Level
Credits	20
Semester	Semester 1
Pre-requisites
Co-requisites
Restrictions	None
Contact Hours	Lecture-40 hours Tutorial-7 hours Practical Classes and workshops-14 hours Guided independent study-139 hours Total: 200 hours
Exclusions
Description	This module extends and deepens students understanding of analogue and digital electronics at level H. It is divided into two sections: Analogue electronics Power amplifier circuits are introduced. Class A, B and AB amplifiers are studied in detail along with the relatedissues of efficiency, power dissipation and heat sinking requirements. High frequency performance of transistorsis studied. The resulting effects on the common‐emitter amplifier and measures to counter them are explored.Sources of noise in electronic circuits are introduced. Concepts of noise figure, noise temperature and thedesign of low‐noise amplifiers are studied. The design of active RC filters is introduced. Computer Hardware and Digital Design Students deepen their knowledge of design methods of digital systems and are introduced to Hardware Description Languages and automatic synthesis. Implementation styles (e.g. ASIC, FPGA) are introduced. The principal functional units of a modern computer system are designed. The principles of digital systems testing. Detailed Syllabus: Computer Hardware and Digital Design DESIGN FLOWS Frontend and backend tools Logic synthesis and physical synthesis Implementation technologies: ASIC, FPGA, CPLD, embedded software Role of Hardware Description Languages Types of description: structural, netlist, behavioural, register transfer, algorithmic VHDL Concurrent and sequential execution Events and the event queue processes Types and type conversion Testbenches Register transfer level coding COMPUTER SYSTEMS Computer organisation Memory maps Bus cycles Memory types: SRAM, DRAM, ROM, EPROM. Busses and bridges: the PC motherboard and its chipset Memory hierarchies: cache systems DESIGN OF HIGH PERFORMANCE DIGITAL SYSTEMS When is hardware better than software? ASICs and FPGAs. Pipelining. Latency and throughput. Performance calculations for pipelined systems MICROPROCESSOR HARDWARE RISC and CISC. Pipelined execution. Control and Data hazards. Pipeline stalls and bubbles, and their impact on throughput Resolution of control and data hazards: compiler methods; hardware methods ADVANCED MICROPROCESSOR SYSTEMS Out of order execution Speculative execution and branch prediction Superscalar and superpipelined processors TEST AND TESTABILITY Fault models Path sensitization methods Boolean differences Scan path methods Boundary scan Built‐in self‐test Analogue electronics. POWER AMPLIFIER DESIGN Operating modes Output stage selection Biasing Power dissipation, thermal effects and protection. LOW NOISE AMPLIFIER DESIGN Sources of noise Equivalent noise generators Noise figures. Low noise design RF AMPLIFIER DESIGN Cut‐off frequency Gain bandwidth product Hybrid p equivalent circuit Miller Effect, the Cascode stage RC ACTIVE FILTER DESIGN Synthesis by sections Dynamic range Cascade sequence and pole‐zero pairing Circuits for second order sections Operational simulation Component simulation
Learning Outcomes	By the end of the module students should be able to: Design, model and synthesise simple systems using VHDL; ‐ Explain the key features of modern microprocessor design (e.g. superscalar, superpipelining, out‐of‐order execution, RISC versus CISC), and how they impact in processor performance; Explain the architecture of a modern computer, identify issues affecting performance, and perform quantitative analyses on performance limits imposed by bus and memory hierarchy design Explain the key features of design for test, and design appropriate test patterns and pattern generators for simple digital systems. Design and analyse A, B and AB power amplifier circuits; Design and analyse common‐emitter and cascode amplifiers in terms of their frequency response; Design low noise amplifiers and calculate the noise figure of a common‐emitter amplifier; Design and analyse active RC filter circuits.
Assessment	30067-01 : Digital Electronics Lab report : Coursework (20%) 30067-02 : Exam : Exam (Centrally Timetabled) - Written Unseen (80%)
Assessment Methods & Exceptions	Assessment: In-semester coursework (20%) Exam (80%) Reassessment: Centrally Timetabled Exam - Written Unseen (100%%)
Other
Reading List